Vendor Strategy Summary
Key Strategic Signals
View AllTSMC Ramps PIC Capacity to 25K Wafers, CPO Silicon Photonics Poised to Disrupt AI Interconnects
TSMC plans to expand its PIC capacity to 25,000 wafers per month by 2028, with its COUPE platform becoming critical for ...
Etched Unveils Sohu Transformer ASIC: Claims 20x H100 Inference Throughput, Challenging NVIDIA's Grip
AI chip startup Etched emerges from stealth with Sohu, a Transformer-specific ASIC on TSMC N4P with 144GB HBM3E. By hard...
TSMC, ASML, imec Demonstrate 300mm 2D Material CMOS with 50nm CPP, 94% Yield
TSMC, ASML, and imec jointly demonstrated the first 300mm wafer-scale integration of 2D material transistors at VLSI 202...
Recent Signals
View All IntelligenceTSMC Adds Winbond to WoW 3D Stacking Memory Supply, Breaking DRAM Oligopoly
Winbond joins TSMC's Wafer-on-Wafer (WoW) 3D stacking advanced packaging supply chain, becoming a ne...
TSMC Bets on CoPoS and Glass Substrates: Packaging Paradigm Shifts from Wafer-Level to Panel-Level, AI Chip TCO Inflection
TSMC is replacing CoWoS with CoPoS (panel-level packaging), using 750x620mm square panels and glass ...
TSMC under triple pressure: customer diversification, patent challenges, and EUV strategy shift
TSMC faces operational, legal, and commercial pressures: Google splits Icefish AI chip production wi...
TSMC Capacity Crunch Reshapes Foundry Landscape: Google, AMD, Tesla Move to Samsung for Advanced Nodes
TSMC's advanced capacity shortage through 2027 pushes Google, AMD, and Tesla to Samsung for 3nm/2nm ...
TSMC Accelerates Glass Substrate CoWoS with Japanese and Taiwan Partners
TSMC partners with Ibiden and Innolux to develop glass substrates for next-gen CoWoS packaging. Simu...
TSMC Reveals Glass Substrate Plan for CoWoS, Marking Packaging Inflection
TSMC publicly disclosed its glass substrate development plan for CoWoS, partnering with Ibiden and I...
TSMC Discloses Glass Substrate Pilot, Packaging Paradigm Shifts
TSMC, with Ibiden and Innolux, publicly discloses glass substrate integration into CoWoS for advance...
TSMC Q1 Earnings: Advanced Packaging Capacity Bottleneck to Persist, Constraining AI Chip Supply Through 2025
TSMC Q1 earnings show HPC crossing 60% revenue share for the first time; CoWoS advanced packaging ca...
TSMC 2026 Outlook: AI Demand Drives 30%+ Revenue Growth, Advanced Process and Packaging Dual Constraints
Behind TSMC's revenue growth forecast is dual logic of 'volume and price both rising': AI chip deman...
TSMC Discloses 2nm and Beyond Technology Roadmap
TSMC announces its 2nm (N2) process will adopt GAAFET architecture replacing FinFET, with plans for ...
Related Analysis
Intel Fab Division Sale Rumors: TSMC-Led Restructuring of Global Foundry Landscape
Reuters reported TSMC proposed a JV with NVIDIA/AMD/Broadcom/Qualcomm to take ov...
Read Analysis →Intel vs AMD Server CPU Price War: The x86 Duo's Battle for Pricing Power in the AI Era
Intel and AMD simultaneously raised server CPU prices in July 2026, marking the ...
Read Analysis →Advanced Process and AI Chip Supply Chain Restructuring: The Industry Race from 2nm to HBM4E
In July 2026, Samsung's HBM4E yield surpassed 70% with PRA scheduled for Novembe...
Read Analysis →