Reports
AI-generated structured vendor updates
JCET's $1.4B AI Packaging Capex Reshapes Advanced Packaging Supply Chain
JCET announces $1.4B capex for AI advanced packaging in 2026, targeting Chiplet, HBM, 2.5D/3D. This marks Chinese OSAT's major entry into high-end packaging, complementing TSMC's CoWoS expansion and shifting AI packaging from Taiwan-centric to cross-strait division, supporting local hyperscalers' computing needs.
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies from NVIDIA GPU to include AI server CPUs (MediaTek, AMD) and ASICs (Broadcom). CoPoS panel-level packaging enters pilot production in 2027.
AWS Sells Trainium 3 Externally, Challenging NVIDIA's AI Training Chip Dominance
AWS begins external sales of its Trainium 3 AI training chip, fabricated on TSMC 3nm process, delivering 2.52 PFLOPS per chip. Early customers include Anthropic and Uber. This move directly challenges NVIDIA's dominance and marks AWS's strategic shift from cloud provider to chip vendor.
NVIDIA Vera CPU: Max Single-Threaded Performance at Scale for Agentic AI
NVIDIA launches Vera CPU, a max single-threaded CPU at scale for agentic AI. With Olympus cores delivering 1.8x sustained per-core performance over x86, 1.2TB/s LPDDR5X bandwidth, and 3.4TB/s core-to-core bandwidth, Vera integrates into NVIDIA's unified AI factory architecture, aiming to lock users into its ecosystem.
AI Innovators Adopt NVIDIA Vera — Why Max Single-Threaded CPU at Scale Matters
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Qualcomm Dragonfly: 250-core CPU, HBC memory, UALink interconnects target AI inference TCO
Qualcomm unveils full data center portfolio: Dragonfly C1000 250-core Oryon CPU (>5GHz, PCIe Gen7, CXL), HBC near-memory compute (133TB/s Gen1, 18x-54x effective BW), AI300 inference accelerator (UALink/ESUN scale-up), and 800G/1.6T connectivity. Multi-year Meta CPU deal. Commercial sampling 2027-2028. Targets inference TCO with tokens-per-watt leadership.
Nvidia Vera Rubin CPU: 10-Wide Core Redefines CPU for Agentic Computing
At GTC Taipei 2026, Nvidia unveiled the Vera Rubin CPU with a custom 10-wide fetch/decode/execute pipeline, claiming world-leading IPC and bandwidth. Designed for agentic computing, it complements Nvidia GPUs. Nvidia also announced a partnership with Microsoft to reinvent the PC as a Personal AI and committed to returning 50% of free cash flow to shareholders.
AMD Mustang Peak Threadripper: 144 cores, PCIe 6.0, TR6 socket – Power and memory challenges loom
AMD's Zen 6 Threadripper 'Mustang Peak' is confirmed with 2nm TSMC process, DDR5, PCIe 6.0, and a new TR6 socket. Using Powderhorn CCDs, it scales to 144 cores (288 threads) with clocks above 6 GHz. However, massive power draw and memory bandwidth demands (possibly requiring MRDIMM) raise platform cost concerns.
NVIDIA Vera 88-Core Arm CPU: Control Plane Shifts from x86 to NVIDIA for AI Agent Workloads
NVIDIA unveils Vera, its first standalone datacenter CPU with 88 custom Arm Olympus cores, monolithic mesh, 1.2TB/s LPDDR5X bandwidth, achieving 1.8x x86 performance in agent workloads. Tightly coupled with GPUs via NVLink-C2C, Vera shifts the control plane from Intel/AMD to NVIDIA. First customers: OpenAI, Anthropic. Production Q3 2026.
HPE Launches Vera CPU Server for Agentic AI, Reshaping Server Ecosystem
HPE unveils ProLiant DL394 Gen12 with NVIDIA Vera CPU, purpose-built for agentic AI and reinforcement learning. It offers extreme single-core performance and high memory bandwidth, with HPE iLO security and Compute Ops Management. The platform is validated with Redpanda and NYSE for financial workloads.
NVIDIA RTX Spark: SoC Seizes PC Control, AI Compute Revolution with Ecosystem Lock-in
NVIDIA launches RTX Spark SoC, integrating Blackwell GPU with 20-core Grace CPU (MediaTek co-designed), NVLink-C2C at 600GB/s, up to 128GB unified memory, 1 petaflop FP4 AI, and local 120B-parameter LLM support. This marks a shift from GPU vendor to platform provider, directly challenging Apple M, Qualcomm, and x86 incumbents.
NVIDIA's Triple Play: Vera CPU, N1X Laptop Chip, and $6.5B Silicon Photonics Reshape AI Infra Control
NVIDIA delivers first agent-specific Vera CPU (88 Arm v9.2 cores, 1.2TB/s memory bandwidth), teases consumer N1X laptop chip, and invests $6.5B in silicon photonics. This shifts AI orchestration control from x86 to NVIDIA's Arm ecosystem, while CPO addresses memory wall, but volume production remains challenging until post-2028.
Huawei's Tao Law: LogicFolding Bypasses Lithography, 55% Density Gain on Fixed Node
At ISCAS 2026, Huawei's He Tingbo unveiled the Tao Law, replacing geometric scaling with temporal optimization targeting tau (characteristic time). LogicFolding vertically stacks active layers to shorten critical paths, achieving 55% transistor density increase and 41% energy efficiency gain on a fixed node. Kirin 2026 reaches 3.1GHz; Ascend series will adopt LogicFolding. The roadmap projects equivalent 1.4nm density by 2031, fundamentally challenging Moore's Law's lithography dependency.
Arm Expands into Silicon Products with First Self-Designed AGI CPU
Arm is expanding its compute platform into production silicon for the first time, launching the self-designed Arm AGI CPU for AI data centers and agentic workloads. It targets over 2x performance per rack versus x86 platforms and is backed by lead partner Meta, customers like OpenAI, and a broad OEM/ODM ecosystem.