Reports
AI-generated structured vendor updates
Nokia与Ericsson联合推出业界首个商用AI-RAN平台
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台积电四季度3纳米月产能预计达18万片
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NVIDIA低调组建AI安全与网络安全工程团队
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英伟达AMD博通追单：台积电3nm月产18万片目标有望提前至Q4初达成，2nm年底冲刺10万片
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AMD二季度净利润增超2.5倍，数据中心营收增长107%
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TSMC Develops EMIB-like Packaging to Challenge Intel and Ease CoWoS Bottleneck
TSMC is developing an EMIB-like advanced packaging technology that uses small silicon bridges instead of large silicon interposers, reducing cost and complexity while easing CoWoS capacity constraints. This move counters Intel's EMIB technology and addresses the growing packaging demands of AI accelerators, securing TSMC's dominance in advanced packaging.
NVIDIA Vera Rubin Platform and Dynamo 1.0 Disaggregate Inference, Shift Focus to Intelligence per Dollar
NVIDIA unveils Vera Rubin platform with a 7-chip stack (Vera CPU, Rubin GPU, NVLink 6, etc.) and Dynamo 1.0 inference disaggregation. A single NVL72 rack packs 72 GPUs/36 CPUs with 1.6 PB/s bandwidth, achieving up to 7x inference performance. The new 'intelligence per dollar' metric signals a shift from training to inference cost competition.
Meta to lease AI compute to Anthropic, signaling infrastructure monetization push
Meta is in talks to lease AI compute capacity to Anthropic, aiming to monetize its massive infrastructure investment. This marks Meta's shift from internal consumer to external provider, potentially reshaping the AI compute market and intensifying competition with cloud providers.
Huang Denies Vera Rubin Delay; NVIDIA Defends AI Compute Throne
Jensen Huang officially denies rumors of a delay for the Vera Rubin platform, stating it is already in production and on track for mass deployment. This move aims to quell market anxiety over NVIDIA's product roadmap and solidify its leadership in AI training and inference chips.
NVIDIA Halves Asian AI Chip Customers, Whitelist Regime Reshapes Supply Chain
NVIDIA slashes its authorized AI chip customer list in Asia by more than half, establishing a whitelist regime in Singapore, Malaysia, and Japan. Customers must submit detailed business proofs and end-use declarations. This move, aimed at preventing illegal diversions to China, will reshape the global AI chip supply chain and force enterprises to reassess procurement strategies.
TSMC CoWoS Capacity to Reach 200k Wafers by 2027, Diversifying from GPU to CPU and ASIC
TSMC targets 200k wpm CoWoS capacity by 2027, narrowing supply-demand gap from 20% to 10%. Customer base diversifies from NVIDIA GPU to include AI server CPUs (MediaTek, AMD) and ASICs (Broadcom). CoPoS panel-level packaging enters pilot production in 2027.
Anthropic Locks 3.5GW TPU Compute with Broadcom, Signaling Shift to Custom AI ASICs
Broadcom's Q2 FY2026 filing reveals a 3.5GW TPU compute deal with Anthropic starting 2027. This marks a strategic shift from general-purpose GPUs to custom ASICs for AI workloads, with OpenAI and Meta making similar multi-GW commitments, signaling a fundamental change in AI infrastructure.
TSMC Ramps PIC Capacity to 25K Wafers, CPO Silicon Photonics Poised to Disrupt AI Interconnects
TSMC plans to expand its PIC capacity to 25,000 wafers per month by 2028, with its COUPE platform becoming critical for reducing latency and power in AI systems. Initial capacity is allocated to NVIDIA, Broadcom, and AMD, marking CPO's transition from lab to mass production and accelerating the shift from electrical to optical AI interconnects.
NVIDIA Rigel Core: Single-Threaded CPU as the New Control Plane for Agentic AI
NVIDIA unveils Rosa CPU architecture with custom Rigel core (Arm v9.2), targeting single-threaded performance for Agentic AI workloads, paired with Feynman GPU (1.6nm, 50 PFLOPS) in 2028. This shifts CPU design from core-count scaling to serial-latency optimization, directly challenging AMD EPYC and Intel Xeon dominance.
AWS Boosts Trainium3 ASIC Shipments, Accelerating Custom AI Chip Ecosystem Against NVIDIA
Amazon AWS has notified its supply chain to increase Q3 2026 shipments of Trainium3-based ASIC servers by 20-30%. This reflects growing confidence in its custom AI chips and a strategic push to reduce reliance on NVIDIA GPUs. AWS also partnered with OpenAI to develop a Stateful Runtime Environment on Bedrock.
NVIDIA Denies Kyber NVL144 Delay, But 78-Layer PCB Bottleneck Exposes AI Hardware Physics Limit
NVIDIA officially denies reports of Kyber NVL144 rack delay to 2028, but SemiAnalysis revelations about a 78-layer ultra-high-density PCB midplane bottleneck and Rubin Ultra cancellation expose hard physical limits in signal integrity and manufacturing, opening a strategic window for AMD and Google.
Google Cloud Launches Blackwell GPU Confidential VM & Open-Source Prompt Encryption SDK, Redefining AI Security
Google Cloud upgrades its confidential computing portfolio with Blackwell GPU-based confidential VMs (Confidential G4 VMs preview), open-source Prompt Encryption SDK, and enhanced Confidential Space featuring Intel Trust Authority and Hopper GPU support, addressing TEE vulnerability CVE-2026-33697 to bolster AI inference and cross-organization training security.
英伟达RTX 5080公版显卡将在BW2026限量发售，售价8299元
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Anthropic in talks with Samsung for 2nm AI chip, targeting NVIDIA CUDA control shift
Anthropic is in early talks with Samsung to manufacture custom AI chips using 2nm process and advanced packaging, hiring ex-OpenAI chip engineer Clive Chan. This aims to reduce NVIDIA GPU dependency and seize control of AI infrastructure, signaling a control plane shift in AI compute.
Anthropic Claude Goes Exclusive on Azure, Microsoft Locks AI Model Distribution via GB300
Anthropic's Claude models are now generally available on Azure Foundry, powered by NVIDIA GB300 NVL72 clusters with over 4600 Blackwell Ultra GPUs. Initial models include Opus 4.8 and Haiku 4.5 with prompt caching and extended thinking. Microsoft gains exclusive enterprise distribution, strengthening its competitive position against AWS and Google Cloud.