Reports
AI-generated structured vendor updates
Samsung GAIA AI PC Chip Samples with Memory-Centric NPU, Targeting 50 TOPS
Samsung launches GAIA AI PC processor with 4nm process and memory-centric NPU, integrating LPDDR5X controller with NPU for near-memory computing, achieving 40% energy efficiency improvement and 50 TOPS. Certified for Microsoft Copilot+ PC, Lenovo to adopt in Q4 2026.
MediaTek and Alibaba Cloud Deploy Tongyi Qianwen LLM on Dimensity Chips
MediaTek partners with Alibaba Cloud to deploy a small version of the Tongyi Qianwen LLM on Dimensity 9300/8300 mobile platforms, enabling offline multi-turn conversations. This move aims to capture edge AI inference control via NPU optimization and SDK integration, directly challenging Qualcomm.
Anthropic Starts Custom AI Chip Development, Talks Samsung 2nm, Aims for Compute Independence
Anthropic has initiated its own AI chip development and is in talks with Samsung for 2nm foundry services. The move aims to reduce reliance on NVIDIA GPUs, optimize inference costs, and strengthen its technology moat ahead of a potential IPO. It joins OpenAI, Google, and others in the custom ASIC race, signaling a shift from software to hardware competition.
Samsung Re-accelerates 1.4nm Node R&D, Adopts High-NA EUV Lithography
Samsung Electronics is re-accelerating its 1.4nm (SF1.4) process node R&D, targeting mass production by 2028-2029. It has procured High-NA EUV lithography equipment from ASML for its NRD-K R&D complex and ordered tools for 12th-gen V-NAND with wafer stacking. The move aims to catch up with TSMC and Intel in the AI chip foundry race.
Huawei's LogicFolding: 3D Stacking Rewrites AI Chip Rules
Huawei's Tau Scaling Law and LogicFolding architecture boost transistor density by 55% and power efficiency by 41% via vertical logic stacking, targeting 1.4nm-class by 2031. Ascend 920/910C chips are now used for DeepSeek V4-Pro post-training, signaling real-world AI workload deployment and challenging Nvidia's dominance in China.
Huawei's Tao Law: LogicFolding Bypasses Lithography, 55% Density Gain on Fixed Node
At ISCAS 2026, Huawei's He Tingbo unveiled the Tao Law, replacing geometric scaling with temporal optimization targeting tau (characteristic time). LogicFolding vertically stacks active layers to shorten critical paths, achieving 55% transistor density increase and 41% energy efficiency gain on a fixed node. Kirin 2026 reaches 3.1GHz; Ascend series will adopt LogicFolding. The roadmap projects equivalent 1.4nm density by 2031, fundamentally challenging Moore's Law's lithography dependency.
SK Hynix Jumps to TSMC 3nm for HBM4E Logic Die to Counter Samsung's 4nm Lead
SK Hynix plans to use TSMC's 3nm process for the logic die in its 7th-gen HBM4E, a leap from the 12nm used in HBM4. This aims to reverse the performance gap with Samsung (which used 4nm logic in HBM4) and deliver higher bandwidth and power efficiency for next-gen AI chips like NVIDIA's Vera Rubin Ultra.
AMD and Samsung Deepen Collaboration, Locking HBM4 Supply and Exploring Foundry Partnership
AMD and Samsung signed an MOU, designating Samsung as the primary HBM4 supplier for the next-gen Instinct MI455X GPU and collaborating on DDR5 memory optimized for 6th Gen EPYC CPUs. The companies will also explore opportunities for Samsung to provide foundry services for future AMD products.
Samsung and AMD Deepen AI Hardware Collaboration with HBM4 Supply and Foundry Services
Samsung will be the primary HBM4 supplier for AMD's next-gen MI455X GPU, delivering 13Gbps bandwidth memory. The partners will also develop DDR5 solutions for 6th-gen EPYC CPUs and explore Samsung's foundry services for future AMD products.
NVIDIA and SK hynix Co-Architect Next-Gen Memory for AI Factories, Locking HBM4 to Vera Rubin
NVIDIA and SK hynix announce a multi-year tech partnership to co-develop next-gen memory for Vera Rubin, RTX Spark, and Jetson Thor. Separately, SK Telecom deploys a gigawatt-scale AI cloud using the full DGX stack, targeting 2027. This elevates SK hynix from supplier to co-architect, strengthening NVIDIA's lock-in on HBM and the AI ecosystem.
SK Hynix HBM4E Samples: 3nm Logic, 384GB/GPU, Igniting AI Memory Bandwidth Arms Race
SK Hynix has sampled its 12-layer HBM4E, featuring TSMC 3nm logic die and enhanced per-pin bandwidth, targeting Nvidia Rubin Ultra with 384GB per GPU. This marks the start of a sprint with Samsung in next-gen AI memory, where HBM BOM share has surged to 65-70%.