Reports
AI-generated structured vendor updates
Arm's Self-Designed AGI CPU with Meta: Ecosystem Shift from Licensor to Silicon Vendor
Arm unveils its first self-designed data center CPU, the AGI CPU, with 136 cores on 3nm, purpose-built for agentic AI inference. Co-developed with Meta, which will deploy it across its data centers. Claims 2x rack performance over x86, reducing AI capex by $100B per gigawatt. Signals Arm's shift from IP licensing to direct silicon sales, reshaping ecosystem dynamics.
Apple Expands Private Cloud Compute to Google Cloud with NVIDIA Confidential GPUs
Apple at WWDC 2026 expands Private Cloud Compute (PCC) to Google Cloud, leveraging NVIDIA GPU Confidential Computing for secure AI inference. This marks a strategic shift from Apple-owned data centers to third-party cloud, alongside M6 Neural Engine performance gains.
Arm AGI CPU Demand Doubles, Targets AI Inference Control, Threatens x86 Dominance
Arm doubled its demand forecast for its first in-house datacenter CPU, the AGI CPU, projecting over $2B revenue in FY2027-2028. The 136-core, 3nm Neoverse V3-based chip targets agentic AI inference, claiming 2x rack-level performance over x86. Meta is a key partner; OpenAI, Cloudflare also onboard. This marks Arm's strategic pivot from IP licensor to direct silicon vendor.
TSMC under triple pressure: customer diversification, patent challenges, and EUV strategy shift
TSMC faces operational, legal, and commercial pressures: Google splits Icefish AI chip production with Samsung, US ITC patent probe risks import bans, and resource bottlenecks (labor, water, power) limit expansion. TSMC confirms it will skip high-NA EUV until 2029, using multi-patterning on low-NA EUV for 2nm, saving $5-10B.
Google Trillium TPU: 4.7x Training Boost Masks Vendor Lock-in and Ecosystem Risks
Google Cloud unveils 6th-gen TPU Trillium with 3nm process, delivering 4.7x training and 2.5x inference performance gains, with 2x energy efficiency over NVIDIA H100. However, Trillium is exclusive to Google Cloud TPU v6p instances and deeply integrated into AI Hypercomputer architecture, creating a full-stack lock-in from silicon to networking.
ASML EXE:5200 High-NA EUV: 8nm Resolution Locks 2nm Node, Cost Trap Looms
ASML launches the EXE:5200 High-NA EUV lithography system, boosting resolution from 13nm to 8nm and wafer throughput to 220 WPH, enabling 2nm and beyond. Intel is the first customer for its 18A process. ASML also reveals Hyper-NA (NA 0.85) development for sub-1nm nodes.
Samsung 3nm GAA Yield Hits 80%, Lands Nvidia Order: TSMC Monopoly Challenged
Samsung Electronics announced its 3nm GAA process yield has exceeded 80%, securing orders from Nvidia for mid-range GPUs. This milestone marks the commercialization of Samsung's SF3 technology, aiming to reduce Nvidia's reliance on TSMC.
Arm Doubles AGI CPU Revenue Target, Signaling Pivot from IP Licensor to Direct Silicon Competitor
Arm reported record FY2026 revenue of $4.92B and doubled its AGI CPU revenue forecast to over $2B by 2028. The 136-core, 3nm, 300W processor, co-developed with Meta, targets AI Agent workloads and has attracted OpenAI and major hyperscalers. This marks Arm's strategic shift from IP licensing to direct silicon competition, triggering FTC antitrust scrutiny.
TSMC Accelerates Glass Substrate CoWoS with Japanese and Taiwan Partners
TSMC partners with Ibiden and Innolux to develop glass substrates for next-gen CoWoS packaging. Simulation shows 16% warpage improvement, 27% resistance reduction, targeting AI chip performance and reliability amid competition from Intel and Samsung.
Applied Materials Launches Deposition and Etch Systems for 3D Chip Scaling
Applied Materials unveils Centris Spectral SiN ALD for uniform dielectric deposition in GAA contacts and Producer Selectra Mo Etch for molybdenum-based 3D NAND word line separation, addressing high-aspect-ratio uniformity issues critical for AI chip manufacturing.
Intel Foundry Lands Google TPU Packaging Deal: EMIB-T Shakes TSMC's AI Chip Monopoly
Intel secures a multi-billion-dollar deal to package over 3 million Google TPUs using its advanced EMIB-T 2.5D packaging, while the chips themselves remain fabricated at TSMC. This marks Intel's strategic shift from CPU vendor to second-source AI packaging partner, targeting 2028 production. Intel's 18A node yields exceed expectations, but analysts caution the scope is limited to packaging.
NVIDIA RTX Spark SoC Invades Windows PC: Arm CPU + GPU with 128GB Unified Memory Reshapes AI PC
At HPE Discover 2026, NVIDIA unveiled the RTX Spark SoC for Windows PCs, built on TSMC 3nm with a MediaTek-designed Arm CPU, 70B transistors, and up to 128GB unified memory. This marks NVIDIA's official entry into the PC SoC market, directly challenging Intel, AMD, and Qualcomm in the AI PC segment.
MediaTek Doubles AI ASIC Target to $2B, Challenges Broadcom in Data Center Custom Silicon
MediaTek doubles its 2026 AI ASIC revenue target to $2B, leveraging Google hyperscaler deals and the NVIDIA RTX Spark chip (featuring MediaTek's N1X Arm CPU). It aims for 10-15% of the $70-80B custom AI chip market by 2027, directly challenging Broadcom's dominance.
MediaTek AI ASIC Deal with Google Reshapes Custom Silicon Landscape
MediaTek's landmark ASIC deal with Google for AI infrastructure doubles 2026 revenue target to $2B. Joint N1X CPU with Nvidia for RTX Spark AI PC and potential SpaceX/xAI orders on Intel 14A process signal a strategic pivot from consumer chips to AI custom silicon, challenging Broadcom's dominance.
Intel and SambaNova Launch Rack-Scale AI, CPU Reclaims Inference Control
At Computex 2026, Intel unveiled a rack-scale AI infrastructure combining Xeon 6+ processors with SambaNova SN-50 RDU, and a decoupled inference cloud (Vector Core Compute) using Xeon 6+ for orchestration, Blackwell GPU for prefill, and SN40 RDU for decode. This CPU-centric approach targets agentic AI inference, challenging NVIDIA's GPU dominance.
NVIDIA RTX Spark: SoC Seizes PC Control, AI Compute Revolution with Ecosystem Lock-in
NVIDIA launches RTX Spark SoC, integrating Blackwell GPU with 20-core Grace CPU (MediaTek co-designed), NVLink-C2C at 600GB/s, up to 128GB unified memory, 1 petaflop FP4 AI, and local 120B-parameter LLM support. This marks a shift from GPU vendor to platform provider, directly challenging Apple M, Qualcomm, and x86 incumbents.
Huawei's Tao Law: LogicFolding Bypasses Lithography, 55% Density Gain on Fixed Node
At ISCAS 2026, Huawei's He Tingbo unveiled the Tao Law, replacing geometric scaling with temporal optimization targeting tau (characteristic time). LogicFolding vertically stacks active layers to shorten critical paths, achieving 55% transistor density increase and 41% energy efficiency gain on a fixed node. Kirin 2026 reaches 3.1GHz; Ascend series will adopt LogicFolding. The roadmap projects equivalent 1.4nm density by 2031, fundamentally challenging Moore's Law's lithography dependency.
Meta-Broadcom Multi-Year 2nm AI Chip Partnership, Initial 1GW+ Deployment
Meta and Broadcom announced multi-year, multi-generation strategic partnership to co-develop MTIA (Meta Training and Inference Accelerator) chips through 2029. Initial deployment exceeds 1GW, with multi-gigawatt expansion planned. Industry-first 2nm AI compute accelerator, based on Broadcom XPU platform. Meta has planned MTIA 300/400/450/500 iterations for recommendation, ranking, and large-scale inference. Broadcom CEO Hock Tan to step down from Meta board, transition to strategic advisor.
Samsung and AMD Deepen AI Hardware Collaboration with HBM4 Supply and Foundry Services
Samsung will be the primary HBM4 supplier for AMD's next-gen MI455X GPU, delivering 13Gbps bandwidth memory. The partners will also develop DDR5 solutions for 6th-gen EPYC CPUs and explore Samsung's foundry services for future AMD products.
TSMC Launches CyberShuttle Service to Lower Chip Verification Barriers
TSMC introduces CyberShuttle multi-project wafer service enabling shared wafer manufacturing to reduce prototype costs. The service covers advanced process nodes for early silicon validation and faster time-to-market.